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John L. Hennessy
(ALIAS: John Hennessy, John Leroy Hennessy) [FOAF]  [Follow]

Position: Professor
Affiliation: Stanford University Electrical Engineering and Computer Science
Address: Building 10, Main Quad Stanford, CA 94305
Phone: 650-723-2481
Fax: 650-725-6847
Email:
Homepage: http://www.stanford.edu/~hennessy/
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Statistics: H-index: 48 (See all experts' h-index.)
total citation number: 13180
highest-cited paper: Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors (1998) at 25 Years ISCA: Retrospectives and Reprints (Cited By 1289)

bio:

Professor Hennessy initiated the MIPS project at Stanford in 1981, MIPS is a high- performance Reduc ... More

Research Interest:

Computer Architecture, Computer Organization Design, Quantitative Approach, Software Interface, Shared Memory

Show Temporal Interests (Do you want to see the change of his/her research interests?)

Education: [Edit]

Phd University: SUNY Phd Major: Computer Science Phd Date: 1977
Master University: SUNY Master Major: Computer Science Master Date: 1975
Bachelor University: Villanova University Bachelor Major: Electrical Engineering Bachelor Date: 1973

Publications: [Edit disambiguation Result]

2003(1)
[100]Mainak Chaudhuri, Mark Heinrich, Chris Holt, Jaswinder Pal Singh, Edward Rothberg, John L. Hennessy. Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation. IEEE Trans. Computers, 2003: 862~880    Cited By 13[Bibtex]
2000(1)
[99]David Ofelt, John L. Hennessy. Efficient performance prediction for modern microprocessors.  SIGMETRICS'2000. pp.229~239    Cited By 35[Bibtex]
1999(2)
[98]John L. Hennessy. The Future of Systems Research. IEEE Computer, 1999: 27~33    Cited By 139[Bibtex]
[97]Mark Heinrich, Vijayaraghavan Soundararajan, John L. Hennessy, Anoop Gupta. A Quantitative Analysis of the Performance and Scalability of Distributed Shared Memory. IEEE Trans. Computers, 1999: 205~217   [Bibtex]
1998(6)
[96]Vijayaraghavan Soundararajan, Mark Heinrich, Ben Verghese, Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy. Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors.  ISCA'1998. pp.342~355    Cited By 44[Bibtex] [PDF]
[95]Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz. An Evaluation of Directory Schemes for Cache Coherence.  25 Years ISCA: Retrospectives and Reprints'1998. pp.353~362    Cited By 465[Bibtex] [PDF]
[94]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy. The DASH Prototype: Implementation and Performance.  25 Years ISCA: Retrospectives and Reprints'1998. pp.418~429    Cited By 222[Bibtex] [PDF]
[93]Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy. Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.  25 Years ISCA: Retrospectives and Reprints'1998. pp.376~387    Cited By 1289[Bibtex]
[92]John L. Hennessy. Retrospective: Evaluation of Directory Dchemes for Cache Coherence.  25 Years ISCA: Retrospectives and Reprints'1998. pp.61~62   [Bibtex]
[91]Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy. The Stanford FLASH Multiprocessor.  25 Years ISCA: Retrospectives and Reprints'1998. pp.485~496    Cited By 787[Bibtex] [PDF]
1997(5)
[90]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface, Second Edition. 1997.     Cited By 12[Bibtex]
[89]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface, Second Edition. 1997.     Cited By 12[Bibtex]
[88]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface, Second Edition. 1997.     Cited By 12[Bibtex]
[87]Radhika Thekkath, Amit Pal Singh, Jaswinder Pal Singh, Susan John, John L. Hennessy. An Evaluation of a Commercial CC-NUMA Architecture - The CONVEX Exemplar SPP1200.  IPPS'1997. pp.8~17    Cited By 20[Bibtex]
[86]Ken Kennedy, Charles F. Bender, John W. D. Connolly, John L. Hennessy, Mary K. Vernon, Larry Smarr. A Nationwide Parallel Computing Environment. Commun. ACM, 1997: 62~72    Cited By 20[Bibtex]
1996(5)
[85]John L. Hennessy, David A. Patterson. Computer Architecture: A Quantitative Approach, 2nd Edition. 1996.     Cited By 218[Bibtex]
[84]John L. Hennessy, David A. Patterson. Computer Architecture: A Quantitative Approach, 2nd Edition. 1996.     Cited By 218[Bibtex]
[83]John L. Hennessy, David A. Patterson. Computer Architecture: A Quantitative Approach, 2nd Edition. 1996.     Cited By 218[Bibtex]
[82]Andrew Erlichson, Neal Nuckolls, Greg Chesson, John L. Hennessy. SoftFLASH: Analyzing the Performance of Clustered Distributed Virtual Shared Memory.  ASPLOS'1996. pp.210~220    Cited By 130[Bibtex] [PDF]
[81]Chris Holt, Jaswinder Pal Singh, John L. Hennessy. Application and Architectural Bottlenecks in Large Scale Distributed Shared Memory Machines.  ISCA'1996. pp.134~145    Cited By 43[Bibtex]
1995(3)
[80]John L. Hennessy. Position Paper.  PPSC'1995. pp.868~869   [Bibtex] [PDF]
[79]Jaswinder Pal Singh, Chris Holt, Takashi Totsuka, Anoop Gupta, John L. Hennessy. Load Balancing and Data locality in Adaptive Hierarchical N-Body Methods: Barnes-Hut, Fast Multipole, and Rasiosity. J. Parallel Distrib. Comput., 1995: 118~141   [Bibtex]
[78]Jaswinder Pal Singh, John L. Hennessy, Anoop Gupta. Implications of Hierarchical N-Body Methods for Multiprocessor Architectures. ACM Trans. Comput. Syst., 1995: 141~202    Cited By 79[Bibtex]
1994(10)
[77]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface. 1994.     Cited By 12[Bibtex]
[76]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface. 1994.     Cited By 12[Bibtex]
[75]David A. Patterson, John L. Hennessy. Computer Organization Design: The Hardware/Software Interface. 1994.     Cited By 12[Bibtex]
[74]Mark Heinrich, Jeffrey Kuskin, David Ofelt, John Heinlein, Joel Baxter, Jaswinder Pal Singh, Richard Simoni, Kourosh Gharachorloo, David Nakahira, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy. The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor.  ASPLOS'1994. pp.274~285    Cited By 154[Bibtex]
[73]Steven Cameron Woo, Jaswinder Pal Singh, John L. Hennessy. The Performance Advantages of Integrating Block Data Trabsfer in Cache-Coherent Multiprocessors.  ASPLOS'1994. pp.219~229   [Bibtex]
[72]Truman Joe, John L. Hennessy. Evaluating the Memory Overhead Required for COMA Architectures.  ISCA'1994. pp.82~93    Cited By 50[Bibtex]
[71]Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy. The Stanford FLASH Multiprocessor.  ISCA'1994. pp.302~313    Cited By 787[Bibtex] [PDF]
[70]Rohit Chandra, Anoop Gupta, John L. Hennessy. COOL: An Object-Based Language for Parallel Programming. IEEE Computer, 1994: 13~26    Cited By 69[Bibtex]
[69]Robert P. Wilson, Robert S. French, Christopher S. Wilson, Saman P. Amarasinghe, Jennifer-Ann M. Anderson, Steven W. K. Tjiang, Shih-Wei Liao, Chau-Wen Tseng, Mary W. Hall, Monica S. Lam, John L. Hennessy. SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compilers. SIGPLAN Notices, 1994: 31~37    Cited By 484[Bibtex] [PDF]
[68]Josep Torrellas, Monica S. Lam, John L. Hennessy. False Sharing ans Spatial Locality in Multiprocessor Caches. IEEE Trans. Computers, 1994: 651~663   [Bibtex]
1993(8)
[67]Rohit Chandra, Anoop Gupta, John L. Hennessy. Data Locality and Load Balancing in COOL.  PPOPP'1993. pp.249~259    Cited By 78[Bibtex]
[66]Jaswinder Pal Singh, Truman Joe, Anoop Gupta, John L. Hennessy. An empirical comparison of the Kendall Square Research KSR-1 and Stanford DASH multiprocessors.  SC'1993. pp.214~225   [Bibtex]
[65]Jaswinder Pal Singh, Chris Holt, John L. Hennessy, Anoop Gupta. A parallel adaptive fast multipole method.  SC'1993. pp.54~65    Cited By 59[Bibtex]
[64]Stephen R. Goldschmidt, John L. Hennessy. The Accuracy of Trace-Driven Simulations of Multiprocessors.  SIGMETRICS'1993. pp.146~157    Cited By 96[Bibtex]
[63]Jaswinder Pal Singh, John L. Hennessy, Anoop Gupta. Scaling Parallel Programs for Multiprocessors: Methodology and Examples. IEEE Computer, 1993: 42~50    Cited By 137[Bibtex]
[62]Peter Schnorf, Mahadevan Ganapathi, John L. Hennessy. Compile-time Copy Elimination. Softw., Pract. Exper., 1993: 1175~1200    Cited By 10[Bibtex]
[61]Aaron J. Goldberg, John L. Hennessy. Mtool: An Integrated System for Performance Debugging Shared Memory Multiprocessor Applications. IEEE Trans. Parallel Distrib. Syst., 1993: 28~40    Cited By 101[Bibtex]
[60]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy. The DASH Prototype: Logic Overhead and Performance. IEEE Trans. Parallel Distrib. Syst., 1993: 41~61    Cited By 219[Bibtex]
1992(7)
[59]Josep Torrellas, Anoop Gupta, John L. Hennessy. Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System.  ASPLOS'1992. pp.162~174    Cited By 91[Bibtex] [PDF]
[58]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy. The DASH Prototype: Implementation and Performance.  ISCA'1992. pp.92~103    Cited By 222[Bibtex] [PDF]
[57]Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy. Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors.  ISCA'1992. pp.22~33    Cited By 81[Bibtex]
[56]Steven W. K. Tjiang, John L. Hennessy. Sharlit - A Tool for Building Optimizers.  PLDI'1992. pp.82~93    Cited By 97[Bibtex]
[55]Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica S. Lam. The Stanford Dash Multiprocessor. IEEE Computer, 1992: 63~79    Cited By 1019[Bibtex]
[54]Kourosh Gharachorloo, Sarita V. Adve, Anoop Gupta, John L. Hennessy, Mark D. Hill. Programming for Different Memory Consistency Models. J. Parallel Distrib. Comput., 1992: 399~407    Cited By 90[Bibtex]
[53]Jaswinder Pal Singh, John L. Hennessy. Finding and Exploiting Parallelism in an Ocean Simulation Program: Experience, Results, and Implications. J. Parallel Distrib. Comput., 1992: 27~48    Cited By 46[Bibtex]
1991(10)
[52]Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy. Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors.  ASPLOS'1991. pp.245~257    Cited By 259[Bibtex]
[51]Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy. Two Techniques to Enhance the Performance of Memory Consistency Models.  ICPP (1)'1991. pp.355~364    Cited By 175[Bibtex] [PDF]
[50]Helen Davis, Stephen R. Goldschmidt, John L. Hennessy. Multiprocessor Simulation and Tracing Using Tango.  ICPP (2)'1991. pp.99~107    Cited By 248[Bibtex] [PDF]
[49]Aaron J. Goldberg, John L. Hennessy. MTOOL: A Method for Isolating Memory Bottlenecks in Shared Memory Multiprocessor Programs.  ICPP (2)'1991. pp.251~257    Cited By 19[Bibtex] [PDF]
[48]Anoop Gupta, John L. Hennessy, Kourosh Gharachorloo, Todd C. Mowry, Wolf-Dietrich Weber. Comparative Evaluation of Latency Reducing and Tolerating Techniques.  ISCA'1991. pp.254~263    Cited By 224[Bibtex]
[47]Steven W. K. Tjiang, Michael E. Wolf, Monica S. Lam, K. Pieper, John L. Hennessy. Integrating Scalar Optimization and Parallelization.  LCPC'1991. pp.137~151    Cited By 50[Bibtex]
[46]Dror E. Maydan, John L. Hennessy, Monica S. Lam. Efficient and Exact Data Dependence Analysis.  PLDI'1991. pp.1~14    Cited By 224[Bibtex]
[45]Aaron J. Goldberg, John L. Hennessy. Performance debugging shared memory multiprocessor programs with MTOOL.  SC'1991. pp.481~490    Cited By 60[Bibtex]
[44]Aaron J. Goldberg, John L. Hennessy. MTOOL: A Method for Detecting Memory Bottlenecks.  SIGMETRICS'1991. pp.210~211   [Bibtex]
[43]John L. Hennessy, Norman P. Jouppi. Computer Technology and Architecture: An Evolving Interaction. IEEE Computer, 1991: 18~29    Cited By 140[Bibtex]
1990(10)
[42]David A. Patterson, John L. Hennessy. Computer Architecture: A Quantitative Approach. 1990.    [Bibtex]
[41]David A. Patterson, John L. Hennessy. Computer Architecture: A Quantitative Approach. 1990.    [Bibtex]
[40]David A. Patterson, John L. Hennessy. Computer Architecture: A Quantitative Approach. 1990.    [Bibtex]
[39]Josep Torrellas, John L. Hennessy. Estimating the Performance Advantages of Relaxing Consistency in a Shared Memory Multiprocessor.  ICPP (1)'1990. pp.26~34    Cited By 20[Bibtex] [PDF]
[38]Josep Torrellas, Monica S. Lam, John L. Hennessy. Share Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates.  ICPP (2)'1990. pp.266~270   [Bibtex] [PDF]
[37]Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy. Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.  ISCA'1990. pp.15~26    Cited By 1289[Bibtex]
[36]Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy. The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor.  ISCA'1990. pp.148~159    Cited By 700[Bibtex] [PDF]
[35]Josep Torrellas, John L. Hennessy, Thierry Weil. Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor.  SIGMETRICS'1990. pp.163~172    Cited By 13[Bibtex]
[34]Yigal Brandman, Alon Orlitsky, John L. Hennessy. A Spectral Lower Bound Techniqye for the Size of Decision Trees and Two Level AND/OR Circuits. IEEE Trans. Computers, 1990: 282~287   [Bibtex]
[33]Fred C. Chow, John L. Hennessy. The Priority-Based Coloring Approach to Register Allocation. ACM Trans. Program. Lang. Syst., 1990: 501~536    Cited By 323[Bibtex]
1989(4)
[32]Steven A. Przybylski, Mark Horowitz, John L. Hennessy. Characteristics of Performance-Optimal Multi-Level Cache Hierarchies.  ISCA'1989. pp.114~121    Cited By 62[Bibtex]
[31]K. Gopinath, John L. Hennessy. Copy Elimination in Functional Languages.  POPL'1989. pp.303~314    Cited By 36[Bibtex] [PDF]
[30]Anant Agarwal, Mark Horowitz, John L. Hennessy. An Analytical Cache Model. ACM Trans. Comput. Syst., 1989: 184~215   [Bibtex] [PDF]
[29]Peter Steenkiste, John L. Hennessy. A Simple Interprocedural Register Allocation Algorithm and Its Effectiveness for Lisp. ACM Trans. Program. Lang. Syst., 1989: 1~32    Cited By 58[Bibtex]
1988(7)
[28]Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz. An Evaluation of Directory Schemes for Cache Coherence.  ISCA'1988. pp.280~289    Cited By 465[Bibtex] [PDF]
[27]Steven A. Przybylski, Mark Horowitz, John L. Hennessy. Performance Tradeoffs in Cache Design.  ISCA'1988. pp.290~298    Cited By 153[Bibtex]
[26]Kourosh Gharachorloo, Vivek Sarkar, John L. Hennessy. A Simple and Efficient Implmentation Approach for Single Assignment Languages.  LISP and Functional Programming'1988. pp.259~268    Cited By 15[Bibtex]
[25]Helen Davis, John L. Hennessy. Characterizing the Synchronization Behavior of Parallel Programs.  PPOPP/PPEALS'1988. pp.198~211    Cited By 17[Bibtex]
[24]Peter Steenkiste, John L. Hennessy. Lisp on a Reduced-Instruction-Set Processor: Characterization and Optimization. IEEE Computer, 1988: 34~45    Cited By 48[Bibtex]
[23]Anant Agarwal, John L. Hennessy, Mark Horowitz. Cache Performance of Operating System and Multiprogramming Workloads. ACM Trans. Comput. Syst., 1988: 393~431    Cited By 250[Bibtex]
[22]Thomas R. Gross, John L. Hennessy, Steven A. Przybylski, Christopher Rowen. Measurement and Evaluation of the MIPS Architecture and Processor. ACM Trans. Comput. Syst., 1988: 229~257    Cited By 24[Bibtex]
1987(1)
[21]Peter Steenkiste, John L. Hennessy. Tags and Type Checking in Lisp: Hardware and Software Approaches.  ASPLOS'1987. pp.50~59    Cited By 42[Bibtex]
1986(4)
[20]Scott McFarling, John L. Hennessy. Reducing the Cost of Branches.  ISCA'1986. pp.396~403    Cited By 264[Bibtex]
[19]Vivek Sarkar, John L. Hennessy. Partitioning Parallel Programs for Macro-Dataflow.  LISP and Functional Programming'1986. pp.202~211    Cited By 84[Bibtex]
[18]Peter Steenkiste, John L. Hennessy. LISP on a Reduced-Instruction-Set-Processor.  LISP and Functional Programming'1986. pp.192~201    Cited By 18[Bibtex]
[17]Vivek Sarkar, John L. Hennessy. Compile-time partitioning and scheduling of parallel programs.  SIGPLAN Symposium on Compiler Construction'1986. pp.17~26    Cited By 145[Bibtex]
1985(1)
[16]Christopher Rowen, John L. Hennessy. SWAMI: a flexible logic implementation system.  DAC'1985. pp.169~175    Cited By 11[Bibtex]
1984(3)
[15]Fred C. Chow, John L. Hennessy. Register allocation by priority-based coloring (with retrospective).  Best of PLDI'1984. pp.91~103   [Bibtex]
[14]Fred C. Chow, John L. Hennessy. Register allocation by priority-based coloring.  SIGPLAN Symposium on Compiler Construction'1984. pp.222~232    Cited By 236[Bibtex]
[13]John L. Hennessy. VLSI Processor Architecture. IEEE Trans. Computers, 1984: 1221~1246    Cited By 165[Bibtex]
1983(1)
[12]John L. Hennessy, Thomas R. Gross. Postpass Code Optimization of Pipeline Constraints. ACM Trans. Program. Lang. Syst., 1983: 422~448    Cited By 251[Bibtex]
1982(7)
[11]John L. Hennessy, Norman P. Jouppi, Forest Baskett, Thomas R. Gross, John Gill. Hardware/Software Tradeoffs for Increased Performance.  ASPLOS'1982. pp.2~11    Cited By 103[Bibtex]
[10]John L. Hennessy, Norman P. Jouppi, John Gill, Forest Baskett, Alex Strong, Thomas R. Gross, Christopher Rowen, Judson Leonard. The MIPS Machine.  COMPCON'1982. pp.2~7    Cited By 73[Bibtex]
[9]John L. Hennessy, Thomas R. Gross. Code Generation and Reorganization in the Presence of Pipeline Constraints.  POPL'1982. pp.120~127    Cited By 29[Bibtex]
[8]Mahadevan Ganapathi, Charles N. Fischer, John L. Hennessy. Retargetable Compiler Code Generation. ACM Comput. Surv., 1982: 573~592    Cited By 97[Bibtex]
[7]John L. Hennessy, Hilding Elmquist. The Design and Implementation of Parametric Types in Pascal. Softw., Pract. Exper., 1982: 169~184    Cited By 6[Bibtex]
[6]John L. Hennessy, Noah Mendelsohn. Compilation of the Pascal Case Statement. Softw., Pract. Exper., 1982: 879~882    Cited By 18[Bibtex]
[5]John L. Hennessy. Symbolic Debugging of Optimized Code. ACM Trans. Program. Lang. Syst., 1982: 323~344    Cited By 164[Bibtex]
1981(3)
[4]John L. Hennessy. Program Optimization and Exception Handling.  POPL'1981. pp.200~206   [Bibtex]
[3]Richard W. Carr, John L. Hennessy. WSClock - A Simple and Effective Algorithm for Virtual Memory Management.  SOSP'1981. pp.87~95    Cited By 71[Bibtex]
[2]John L. Hennessy, Richard B. Kieburtz. The Formal Definition of a Real-Time Language. Acta Inf., 1981: 309~345    Cited By 2[Bibtex]
1980(1)
[1]Michael J. Flynn, John L. Hennessy. Parallelism and Representation Problems in Distributed Systems. IEEE Trans. Computers, 1980: 1060~1086    Cited By 14[Bibtex]